Please use this identifier to cite or link to this item: http://elea.unisa.it:8080/xmlui/handle/10556/187
Title: Stability of Peak-Current-Controlled fourth order StepUp/Down DC/DC converters
Authors: Cantillo, Andrea
Marcelli, Angelo
Femia, Nicola
Keywords: DC/DC converters
SEPIC
CUK
Issue Date: 9-May-2011
Publisher: Universita degli studi di Salerno
Abstract: The topic of this dissertation is the development of models and design methods for non-isolated Switch-Mode Power Supply (SMPS). Of particular interest are DC/DC converters characterized by step up/down conversion ratio (i.e. capable to regulate the output voltage either at a lower or at a higher level with respect to the input voltage). The dissertation is mainly focused on the stability of the Single Ended Primary Inductance Converter (SEPIC) and of the Cuk converter. SEPIC and Cuk converters are both characterized by the presence of an inductor on the input port, thus resulting especially attractive for battery powered applications (e.g.. mobile GSM devices) and for PV applications. The Cuk converter features an inductor on the output port also. Hence, the Cuk converter is particularly suitable in applications where a very low-ripple output current is required (e.g. LED lighting applications). One of the main drawback of these converters is their complicated dynamic, due to the presence of four reactive elements in the power stage (input and output inductors, coupling and output capacitors). In particular, the design of stable SEPIC and Cuk using Peak-Current Control (PCC) may result extremely challenging in presence of large variations of load and line conditions. Instability phenomenon in PCC-SEPIC have been often reported in literature. It has been reported that the PCC-SEPIC is more prone to instability when operating in boost mode (i.e. when the output voltage is higher when the input voltage) and with high load currents. It has also been noted that increasing the output inductance with respect to the input one may mitigate the dynamic behaviour of the converter. However, most of the literature refers to specific examples, and results are obtained via numerical methods. On the contrary, no analytical formulations useful to identify reliable stability boundaries for PCC-SEPIC converters have been given. It is important to notice that although powerful and advanced numerical CAD tools eases the analysis and design of power supplies, analytical models have the advantage of providing the design engineer with insight about the main physical parameters which are responsible for the converter behavior. Similar considerations apply to the PCC-Cuk converter. Thus, the research presented in this dissertation has been mainly focused on: a) The development of a small signal model for PCC-SEPIC and PCC-Cuk capable of recapturing all the relevant aspects of their dynamic. b) The derivation of analytical stability conditions for PCC-SEPIC and PCC-Cuk. With reference to point a), the major improvement with respect to previous SEPIC models lies in the removal of the hypothesis of equality between the input voltage and the voltage across the coupling capacitor voltage when deriving the small signal model of the current controller. To validate the model, stability predictions obtained using numerical techniques have been tested against both simulations and experimental validations. The key role played by the ratio between output and input inductances in ensuring both stability of the converter and a good transient response in presence of step-wise variations of the input voltage has been investigated using numerical techniques. It has also been shown that for each couple of input and output inductances, there exist an optimum value of the coupling capacitor capacitance that ensures the highest damping of the voltage oscillation across the coupling capacitor in response to step-wise variations of the input voltage. With reference to point b), at first a lossless model of the SEPIC converter has been used. It is shown that analytical stability boundaries can be obtained if the impact of the output voltage variations on the coupling capacitor voltage due to an oscillation of the input voltage is neglected. This leads to a reduced-order small signal model of the SEPIC converter. It is also shown that the same reduced-order model can be used to study the Cuk converter stability. Major results for both converters are: 1. The identification of a minimum value for the coupling capacitance below which stability of the converter can not be obtained. Such minimum value increases with the load current and with the decrease of the input voltage. 2. The identification of a critical value for the current modulator gain. Such critical value depends on the voltage conversion ratio, the coupling capacitance value, the current sensor gain and on the ratio between the output and input inductances. 3. The critical value for the current modulator gain represents a minimum or a maximum allowed value depending both on the ratio between the output and input inductances and on the voltage conversion ratio. Comparisons between the analytical stability boundaries obtained via the lossless model and the numerical results given by the complete model allowed to identify the role played by resistive losses of the power components in stabilizing the converter. If losses are neglected in the complete model, numerical results show a good agreement with the analytical ones. On the contrary, when the resistive losses of the power components are considered, the analytical boundaries may result very conservative. This is more evident if the ratio between output and input inductances is lower than the voltage conversion ratio. The reason for this is that the parasitic resistances of power components may damp the converter dynamic enough to guarantee stability even though the constraints listed in point 1 and 2 are violated. Indeed, it has been determined that the minimum coupling capacitance required for stability decreases as the efficiency of the converter decreases. It should be noted that to rely on the power components parasitic elements may be dangerous, as the associated losses vary with line and load conditions, with the aging of the components and with temperature. The information given by the analytical results both provide useful guidelines for the design of a PCC-SEPIC or a PCC-Cuk converter and a valuable alert against possible instability phenomenon in high efficiency design. Experimental validations confirm the results. [edited by author]
Description: 2009 - 2010
URI: http://hdl.handle.net/10556/187
Appears in Collections:Ingegneria dell'Informazione

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